# Based on BuildGates generic.sym #symref # inv2x1 #symref # invx4 not? #symref # invzx1? #symref # invsx1? #symref bufx4 symlib 1.0 OSU_digital_ami05.sym 23 16 32 symref 910 ao22x1 symref 1566 aoi22x1 symref 2245 bufx1 symref 2478 bufx4 symref 2711 bufzx1 symref 3069 dff symref 3475 dffpc symref 4014 invx1 symref 4269 invx4 symref 4524 invzx1 symref 4900 lat symref 5285 latpc symref 5803 mux21x1 symref 6200 nand2x1 symref 6574 nand3x1 symref 7030 nand4x1 symref 7554 nor2x1 symref 7982 nor3x1 symref 8511 nor4x1 symref 9108 tiehigh symref 9254 tielow symref 9425 xnor2x1 symref 9880 xor2x1 symbol ao22x1 * DEF \ port Y out -loc 80 0 65 0 \ pinattrdsp @name -cr 77 -4 8i \ port A in -loc -10 -20 0 -20 \ pinattrdsp @name -cl -5 -25 8i \ port B in -loc -10 -10 0 -10 \ pinattrdsp @name -cl -5 -15 8i \ port C in -loc -10 10 0 10 \ pinattrdsp @name -cl -5 5 8i \ port D in -loc -10 20 0 20 \ pinattrdsp @name -cl -5 15 8i \ permute {[(A,B),(C,D)]} \ arc 65 0 55 -10 40 -15 \ path 17 2 0 2 0 28 17 28 \ path 30 -15 40 -15 \ arc 30 15 37 0 30 -15 \ arc 40 15 55 10 65 0 \ arc 17 28 30 15 17 2 \ arc 17 -2 30 -15 17 -28 \ path 30 15 40 15 \ path 17 -28 0 -28 0 -2 17 -2 \ attrdsp @cell -cl 30 25 10i \ attrdsp @name -ll 35 -20 12 symbol aoi22x1 * DEF \ port Y out -loc 80 0 72 0 \ pinattrdsp @name -cr 77 -4 8i \ port A in -loc -10 -20 0 -20 \ pinattrdsp @name -cl -5 -25 8i \ port B in -loc -10 -10 0 -10 \ pinattrdsp @name -cl -5 -15 8i \ port C in -loc -10 10 0 10 \ pinattrdsp @name -cl -5 5 8i \ port D in -loc -10 20 0 20 \ pinattrdsp @name -cl -5 15 8i \ permute {[(A,B),(C,D)]} \ arc 65 0 55 -10 40 -15 \ path 17 2 0 2 0 28 17 28 \ path 30 -15 40 -15 \ arc 30 15 37 0 30 -15 \ arc 40 15 55 10 65 0 \ arc 65 0 71 0 65 0 \ arc 17 28 30 15 17 2 \ arc 17 -2 30 -15 17 -28 \ path 30 15 40 15 \ path 17 -28 0 -28 0 -2 17 -2 \ attrdsp @cell -cl 30 25 10i \ attrdsp @name -ll 35 -20 12 symbol bufx1 * DEF \ port A in -loc -15 0 0 0 \ pinattrdsp @name -cl -10 -5 8i \ port Y out -loc 45 0 25 0 \ pinattrdsp @name -cr 40 -5 8i \ path 0 -12 25 0 0 12 0 -12 \ attrdsp @name -ll 5 -17 12 \ attrdsp @cell -cl 5 17 10i symbol bufx4 * DEF \ port A in -loc -15 0 0 0 \ pinattrdsp @name -cl -10 -5 8i \ port Y out -loc 45 0 25 0 \ pinattrdsp @name -cr 40 -5 8i \ path 0 -12 25 0 0 12 0 -12 \ attrdsp @name -ll 5 -17 12 \ attrdsp @cell -cl 5 17 10i symbol bufzx1 * DEF \ port A in -loc -15 0 0 0 \ pinattrdsp @name -cl -10 -5 8i \ port Y out -loc 45 0 25 0 \ pinattrdsp @name -cr 40 -5 8i \ port TriState in -loc -15 -20 10 -20 \ pinattrdsp @name -cl -10 -25 8i \ path 0 -12 25 0 0 12 0 -12 \ arc 6 -11 12 -11 6 -11 \ path 10 -19 10 -15 \ attrdsp @name -ll 12 -17 12 \ attrdsp @cell -cl 0 17 10i symbol dff * DEF \ port QP out -loc 60 -30 50 -30 \ pinattrdsp @name -cr 49 -35 8 \ port QN out -loc 60 0 49 0 \ pinattrdsp @name -cr 50 -5 8 \ port D in -loc -10 -30 0 -30 \ pinattrdsp @name -cl 5 -30 8 \ port CLK in -loc -10 0 0 0 \ pinattrdsp @name -cl 15 0 8 \ place latch \ path 0 20 50 20 50 -50 0 -50 0 20 \ path 0 -5 12 0 0 5 \ attrdsp @name -lc 25 -52 12 \ attrdsp @cell -lc 25 30 10 symbol dffpc * DEF \ port QP out -loc 60 -30 50 -30 \ pinattrdsp @name -cr 58 -35 8 \ port QN out -loc 60 0 49 0 \ pinattrdsp @name -cr 50 -5 8 \ port D in -loc -10 -30 0 -30 \ pinattrdsp @name -cl 5 -30 8 \ port CLK in -loc -10 0 0 0 \ pinattrdsp @name -cl 15 0 8 \ port CLR in -loc 20 30 20 20 \ pinattrdsp @name -lc 20 18 8 \ port PRE in -loc 20 -60 20 -50 \ pinattrdsp @name -uc 20 -48 8 \ place latch \ path 0 20 50 20 50 -50 0 -50 0 20 \ path 0 -5 12 0 0 5 \ attrdsp @name -ll 28 -52 12 \ attrdsp @cell -ll 30 30 10 symbol invx1 * DEF \ port A in -loc -17 0 0 0 \ pinattrdsp @name -cl -12 -5 8i \ port Y out -loc 53 0 33 0 \ pinattrdsp @name -cr 48 -5 8i \ arc 25 0 33 0 25 0 \ path 0 -12 25 0 0 12 0 -12 \ attrdsp @name -ll 5 -17 12 \ attrdsp @cell -cl 0 17 10i symbol invx4 * DEF \ port A in -loc -17 0 0 0 \ pinattrdsp @name -cl -12 -5 8i \ port Y out -loc 53 0 33 0 \ pinattrdsp @name -cr 48 -5 8i \ arc 25 0 33 0 25 0 \ path 0 -12 25 0 0 12 0 -12 \ attrdsp @name -ll 5 -17 12 \ attrdsp @cell -cl 0 17 10i symbol invzx1 * DEF \ port A in -loc -17 0 0 0 \ pinattrdsp @name -cl -12 -5 8i \ port Y out -loc 53 0 33 0 \ pinattrdsp @name -cr 48 -5 8i \ port TriState in -loc -15 -20 10 -20 \ pinattrdsp @name -cl -10 -25 8i \ path 0 -12 25 0 0 12 0 -12 \ arc 25 0 33 0 25 0 \ arc 6 -11 12 -11 6 -11 \ attrdsp @name -ll 5 -17 12 \ attrdsp @cell -cl 0 17 10i path 10 -15 10 -20 symbol lat * DEF \ port QP out -loc 60 -30 50 -30 \ pinattrdsp @name -cr 44 -30 8 \ port QN out -loc 60 0 49 0 \ pinattrdsp @name -cr 45 0 8 \ port D in -loc -10 -30 0 -30 \ pinattrdsp @name -cl 5 -30 8 \ port EN in -loc -10 0 0 0 \ pinattrdsp @name -cl 5 0 8 \ place latch \ path 0 20 50 20 50 -50 0 -50 0 20 \ attrdsp @name -lc 25 -52 12 attrdsp \ @cell -lc 25 30 10 \ symbol latpc * DEF \ port QP out -loc 60 -30 50 -30 \ pinattrdsp @name -cr 48 -30 8 \ port QN out -loc 60 0 49 0 \ pinattrdsp @name -cr 45 0 8 \ port D in -loc -10 -30 0 -30 \ pinattrdsp @name -cl 5 -30 8 \ port EN in -loc -10 0 0 0 \ pinattrdsp @name -cl 5 0 8 \ port CLR in -loc 20 30 20 20 \ pinattrdsp @name -lc 20 18 8 \ port PRE in -loc 20 -60 20 -50 \ pinattrdsp @name -uc 20 -48 8 \ place latch \ path 0 20 50 20 50 -50 0 -50 0 20 \ attrdsp @name -ll 28 -52 12 attrdsp \ @cell -ll 30 35 10 \ symbol mux21x1 * DEF \ port Y out -loc 30 -20 20 -20 \ pinattrdsp @name -cr 28 -25 8i \ port A in -loc -10 -40 0 -40 \ pinattrdsp @name -cl -8 -45 8i \ port B in -loc -10 0 0 0 \ pinattrdsp @name -cl -8 -5 8i \ port Sel in -loc 10 -50 10 -43 \ pinattrdsp @name -uc 10 -35 8i \ permute (A,B) \ path 0 -48 0 8 20 -2 20 -38 0 -48 \ attrdsp @name -cl 15 -45 12 \ attrdsp @cell -cl 15 2 10 symbol nand2x1 * DEF \ port Y out -loc 55 0 47 0 \ pinattrdsp @name -cr 52 -4 8i \ port A in -loc -15 -10 0 -10 \ pinattrdsp @name -cl -10 -15 8i \ port B in -loc -15 10 0 10 \ pinattrdsp @name -cl -10 5 8i \ permute all_inputs \ arc 25 15 40 0 25 -15 \ arc 40 0 46 0 40 0 \ path 25 -15 0 -15 0 15 25 15 \ attrdsp @name -ll 5 -22 12 \ attrdsp @cell -cl 5 22 10i symbol nand3x1 * DEF \ port Y out -loc 55 0 47 0 \ pinattrdsp @name -cr 52 -4 8i \ port A in -loc -15 -20 0 -20 \ pinattrdsp @name -cl -10 -25 8i \ port B in -loc -15 0 0 0 \ pinattrdsp @name -cl -10 -5 8i \ port C in -loc -15 20 0 20 \ pinattrdsp @name -cl -10 15 8i \ permute all_inputs \ arc 25 15 40 0 25 -15 \ path 25 -15 0 -15 0 15 25 15 \ arc 40 0 46 0 40 0 \ path 0 -20 0 20 \ attrdsp @name -ll 5 -22 12 \ attrdsp @cell -cl 5 22 10i symbol nand4x1 * DEF \ port Y out -loc 55 0 47 0 \ pinattrdsp @name -cr 52 -4 8i \ port A in -loc -15 -30 0 -30 \ pinattrdsp @name -cl -10 -35 8i \ port B in -loc -15 -10 0 -10 \ pinattrdsp @name -cl -10 -15 8i \ port C in -loc -15 10 0 10 \ pinattrdsp @name -cl -10 5 8i \ port D in -loc -15 30 0 30 \ pinattrdsp @name -cl -10 25 8i \ permute all_inputs \ arc 25 15 40 0 25 -15 \ path 25 -15 0 -15 0 15 25 15 \ arc 40 0 46 0 40 0 \ path 0 -30 0 30 \ attrdsp @name -ll 5 -22 12 \ attrdsp @cell -cl 5 22 10i symbol nor2x1 * DEF \ port B in -loc -15 10 4 10 \ pinattrdsp @name -cl -10 5 8i \ port Y out -loc 55 0 47 0 \ pinattrdsp @name -cr 52 -4 8i \ port A in -loc -15 -10 4 -10 \ pinattrdsp @name -cl -10 -15 8i \ permute all_inputs \ arc 40 0 30 -10 15 -15 \ arc 15 15 30 10 40 0 \ path 0 -15 15 -15 \ arc 0 15 7 0 0 -15 \ arc 40 0 46 0 40 0 \ path 0 15 15 15 \ attrdsp @name -ll 5 -22 12 \ attrdsp @cell -cl 5 22 10i symbol nor3x1 * DEF \ port C in -loc -15 20 0 20 \ pinattrdsp @name -cl -10 15 8i \ port Y out -loc 55 0 47 0 \ pinattrdsp @name -cr 52 -4 8i \ port A in -loc -15 -20 0 -20 \ pinattrdsp @name -cl -10 -25 8i \ port B in -loc -15 0 7 0 \ pinattrdsp @name -cl -10 -5 8i \ permute all_inputs \ arc 40 0 30 -10 15 -15 \ arc 15 15 30 10 40 0 \ path 0 15 0 20 \ path 0 -15 15 -15 \ arc 0 15 7 0 0 -15 \ path 0 15 15 15 \ arc 40 0 46 0 40 0 \ path 0 -20 0 -15 \ attrdsp @name -ll 5 -22 12 \ attrdsp @cell -cl 5 22 10i symbol nor4x1 * DEF \ port C in -loc -15 10 4 10 \ pinattrdsp @name -cl -10 5 8i \ port Y out -loc 55 0 47 0 \ pinattrdsp @name -cr 52 -4 8i \ port A in -loc -15 -30 0 -30 \ pinattrdsp @name -cl -10 -35 8i \ port B in -loc -15 -10 4 -10 \ pinattrdsp @name -cl -10 -15 8i \ port D in -loc -15 30 0 30 \ pinattrdsp @name -cl -10 25 8i \ permute all_inputs \ arc 40 0 30 -10 15 -15 \ arc 15 15 30 10 40 0 \ path 0 -15 15 -15 \ arc 0 15 7 0 0 -15 \ path 0 15 15 15 \ path 0 -30 0 -15 \ arc 40 0 46 0 40 0 \ path 0 15 0 30 \ attrdsp @name -ll 5 -22 12 \ attrdsp @cell -cl 5 22 10i symbol tiehigh * DEF \ port HI out -loc 3 0 3 -12 \ pinattrdsp @name -cr -2 -5 8i \ path 3 -17 5 -12 0 -12 3 -17 \ attrdsp @cell -lc 3 -20 10 symbol tielow * DEF \ port LO out -loc 13 0 13 12 \ pinattrdsp @name -cr 8 -5 8i \ path 25 12 0 12 \ path 10 22 15 22 \ path 5 17 20 17 \ attrdsp @cell -uc 13 25 10 symbol xnor2x1 * DEF \ port B in -loc -20 10 -1 10 \ pinattrdsp @name -cl -15 5 8i \ port Y out -loc 55 0 40 0 \ pinattrdsp @name -cr 45 -5 8i \ port A in -loc -20 -10 -1 -10 \ pinattrdsp @name -cl -15 -15 8i \ permute all_inputs \ arc 35 0 25 -10 10 -15 \ arc 10 15 25 10 35 0 \ arc -5 15 2 0 -5 -15 \ arc 0 15 7 0 0 -15 \ path 0 -15 10 -15 \ path 0 15 10 15 \ attrdsp @name -ll 0 -22 12 \ attrdsp @cell -cl 0 22 10i \ arc 35 0 40 0 35 0 symbol xor2x1 * DEF \ port B in -loc -20 10 -1 10 \ pinattrdsp @name -cl -15 5 8i \ port Y out -loc 50 0 35 0 \ pinattrdsp @name -cr 45 -5 8i \ port A in -loc -20 -10 -1 -10 \ pinattrdsp @name -cl -15 -15 8i \ permute all_inputs \ arc 35 0 25 -10 10 -15 \ arc 10 15 25 10 35 0 \ arc -5 15 2 0 -5 -15 \ arc 0 15 7 0 0 -15 \ path 0 -15 10 -15 \ path 0 15 10 15 \ attrdsp @name -ll 0 -22 12 \ attrdsp @cell -cl 0 22 10i